Lowering power consumption in concurrent checkers via input ordering
نویسندگان
چکیده
منابع مشابه
Input Ordering in Concurrent Checkers to Reduce Power Consumption
A novel approach for reducing power consumption in checkers used for concurrent error detection is presented. Spatial correlations between the outputs of the circuit that drives the primary inputs of the checker are analyzed to order them such that switching activity (and hence power consumption) in the checker is minimized. The reduction in power consumption comes at no additional impact to ar...
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ژورنال
عنوان ژورنال: IEEE Transactions on Very Large Scale Integration (VLSI) Systems
سال: 2004
ISSN: 1063-8210,1557-9999
DOI: 10.1109/tvlsi.2004.836318